In a remarkable leap forward, semiconductor development firm 4DS Memory (ASX:4DS) has unveiled highly impressive results from its cutting-edge memory system endeavor, known as the Fourth Platform Lot wafer. The company’s Chief Technology Officer, Ting Yen, lauded the advancements achieved in the 4DS Platform Lot technology, attributing them to a fruitful partnership with imec, a world-renowned R&D and innovation hub in nano electronics and digital technologies.
Steadfast Collaboration Yields Outstanding Outcome
Ting Yen expressed the company’s satisfaction with its collaboration with imec, commending the comprehensive engineering support that played a pivotal role in realising this significant feat. He extended gratitude to imec for their unwavering commitment, which encompassed the fabrication of the megabit array and culminated in an on-schedule completion.
Notable Strides in Memory Technology
The recent evaluation of the Fourth Platform Lot has unveiled a series of noteworthy enhancements, setting it apart from its predecessors. Notably, the incorporation of 4DS ReRAM memory cells into the imec megabit array stands out as a crucial advancement. Furthermore, 4DS has successfully demonstrated the transferability of its 4DS Interface Switching ReRAM technology. This achievement was accompanied by the demonstration of a fully operational megabit array, replete with 4DS Interface Switching ReRAM memory cells.
Exceptional Performance Parameters and Endurance
The tests have revealed an impressive achievement for 4DS Memory, as consistent read and write speeds equivalent to DRAM have been attained. The memory system has showcased remarkable endurance, boasting a lifespan exceeding 2 billion cycles at DRAM read and write speeds on a megabit array. These robust outcomes serve to validate 4DS’ optimisation strategy, prompting the establishment of a replication of imec’s custom testing hardware and software at the 4DS Fremont facility.
Turning Point for 4DS: Megabit Array Results Shape Strategic Planning
David McAuliffe, interim executive chairman of 4DS, lauded the megabit array results as a pivotal juncture in the company’s trajectory. McAuliffe noted that the company’s board will meticulously deliberate on these outcomes while formulating strategic plans in the forthcoming months. He emphasised that additional analysis of the megabit array is slated to transpire in the ensuing weeks, culminating in a pivotal meeting with imec scheduled for early October, aimed at charting strategic directions.
Strategic Optimisation and Forward Trajectory
The company’s strategic direction took a defining turn in late February this year when 4DS executed a series of optimisation changes. These refinements were seamlessly integrated into the manufacturing schedule of the Fourth Platform Lot at imec. Noteworthy was the achievement of cell operation within the megabit memory array of the Third Platform Lot, underpinned by enhanced test capabilities. This breakthrough allowed 4DS to explore optimised programming conditions, specifically pertaining to the access transistors and write circuitry of imec’s megabit memory platform. The promising results suggested compatibility between 4DS Interface Switching ReRAM cells and imec’s megabit memory platform, thereby de-risking the testing of the Fourth Platform Lot.
A Clear Path Forward: Confirming Future Development
The latest test results provide empirical confirmation of previously held assessments. With prior evaluations affirming the successful programming of cells matching those present in the megabit memory array, the company’s focus now turns to refining the etch process. The goal is twofold: achieving residue-free etching and preventing crystalline damage to the 4DS PCMO layer. Ting Yen emphasised that the company remains steadfast in its commitment to the uniqueness of its technology as an area-based ReRAM. The scalability of 4DS ReRAM across various cell geometries on megabit arrays has been decisively demonstrated. Furthermore, the ReRAM’s read/write speed and endurance parameters align with the company’s objectives in the memory space, where DRAM-like performance characteristics are imperative. The Fourth Platform Lot stands as a resounding testament to the successful realisation of these goals.
